A Scheduling Method for Instruction-Level Parallel Processing of Vector and Scalar Instructions

Takuya Nakaike, Takehito Sasaki, Masayuki Katahira, Hiroaki Kobayashi, Tadao Nakamura

Research output: Contribution to journalArticle

Abstract

Jetpipeline is an architecture where fast computation is realized by combining vector processing and instruction-level parallel processing. Consequently, in order to utilize fully the potential performance of Jetpipeline, it is necessary to increase the vectorization ratio and to extract as many parallel executable instructions as possible. In Jetpipeline, the parallel executable instructions are extracted from code composed of mixed vector and scalar instructions. The vector instruction requires a larger number of execution cycles than the scalar instruction, and it is difficult to apply directly the parallelization techniques used in VLIW and other computers. This study seeks to extract fully the performance of Jetpipeline and proposes a parallelization method by effectively combining the vector and scalar instructions. The effectiveness of the method is verified by simulation.

Original languageEnglish
Pages (from-to)23-33
Number of pages11
JournalSystems and Computers in Japan
Volume30
Issue number13
DOIs
Publication statusPublished - 1999 Nov 30

Keywords

  • Instruction-level parallelism
  • Jetpipeline
  • Vector processing

ASJC Scopus subject areas

  • Theoretical Computer Science
  • Information Systems
  • Hardware and Architecture
  • Computational Theory and Mathematics

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