A power reduction scheme for data buses by dynamic detection of active bits

Masanori Muroyama, Akihiko Hyodo, Takanori Okuma, Hiroto Yasuura

Research output: Contribution to journalArticlepeer-review

2 Citations (Scopus)

Abstract

To transfer a small number, we inherently need a small number of bits. However all bit lines on a data bus change their status and redundant power is consumed. To reduce the redundant power consumption, we introduce a concept named active bit. In this paper, we propose a power reduction scheme for data buses using active bits. Suppressing switching activity of inactive bits, we can reduce redundant power consumption. We propose various power reduction techniques using active bits and the implementation methods. Experimental results illustrate up to 54.2% switching activity reduction.

Original languageEnglish
Pages (from-to)598-605
Number of pages8
JournalIEICE Transactions on Electronics
VolumeE87-C
Issue number4
Publication statusPublished - 2004 Apr

Keywords

  • Active bit
  • Data bus
  • Datapath
  • Dynamic
  • Low power

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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