A personal-use single-chip emulator using dynamically reconfigurable logic array

Koji Kotani, Naoto Miyamoto, Takeshi Ohkawa, Amir Jamak, Soichiro Kita, Tadahiro Ohmi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Citations (Scopus)

Abstract

A personal-use single-chip emulation system using a dynamically reconfigurable logic array named Flexible Processor II (FP2) has been developed. It can emulate large target circuit by sequential execution of sub-circuits divided from the target circuit. The size of the target circuit for emulation is theoretically unlimited. In order to realize such features, FP2 is equipped with Temporal Communication Module (TCM) and Flexible Logic Element (FLE), which are essential for handling temporal data communication between divided sub-circuits and for reducing the amount of configuration data, respectively. A place-and-route tool for FP2 named PELOC, which takes care of sequential execution of divided sub-circuits and carries out the temporal partitioning, spatial partitioning, placement, routing and configuration data generation has also been developed. We have developed a single-chip emulation system on a printed circuit board and confirmed that its emulation speed is several hundred times faster than that of verilog simulator and in some cases also faster than a conventional emulator using lots of parallel-connected FPGAs.

Original languageEnglish
Title of host publication2005 IEEE Asian Solid-State Circuits Conference, ASSCC 2005
PublisherIEEE Computer Society
Pages329-332
Number of pages4
ISBN (Print)0780391624, 9780780391628
DOIs
Publication statusPublished - 2005 Jan 1
Event1st IEEE Asian Solid-State Circuits Conference, ASSCC 2005 - Hsinchu, Taiwan, Province of China
Duration: 2005 Nov 12005 Nov 3

Publication series

Name2005 IEEE Asian Solid-State Circuits Conference, ASSCC 2005

Other

Other1st IEEE Asian Solid-State Circuits Conference, ASSCC 2005
CountryTaiwan, Province of China
CityHsinchu
Period05/11/105/11/3

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

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    Kotani, K., Miyamoto, N., Ohkawa, T., Jamak, A., Kita, S., & Ohmi, T. (2005). A personal-use single-chip emulator using dynamically reconfigurable logic array. In 2005 IEEE Asian Solid-State Circuits Conference, ASSCC 2005 (pp. 329-332). [4017598] (2005 IEEE Asian Solid-State Circuits Conference, ASSCC 2005). IEEE Computer Society. https://doi.org/10.1109/ASSCC.2005.251732