A parallel architecture for quadtree-based fractal image coding

Shinhaeng Lee, S. Omachi, H. Aso

Research output: Chapter in Book/Report/Conference proceedingConference contribution

9 Citations (Scopus)

Abstract

This paper proposes a parallel architecture for quadtree-based fractal image coding. This architecture is capable of performing the fractal image coding based on quadtree partitioning without the external memory for the fixed domain pool. Since a large domain block consists of small domain blocks, the calculations of distortion for all kinds of domain blocks are performed by the summation of the distortions for the maximum-depth domain pool which is extracted from the smallest range blocks of the neighbor processors. Fast comparison module is proposed for this architecture. This module can compute the distortions between range blocks and their eight isometric transformations by one full rotation around the center.

Original languageEnglish
Title of host publicationProceedings - 2000 International Conference on Parallel Processing, ICPP 2000
EditorsDavid J. Lilja
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages15-22
Number of pages8
ISBN (Electronic)0769507689
DOIs
Publication statusPublished - 2000 Jan 1
EventInternational Conference on Parallel Processing, ICPP 2000 - Toronto, Canada
Duration: 2000 Aug 212000 Aug 24

Publication series

NameProceedings of the International Conference on Parallel Processing
Volume2000-January
ISSN (Print)0190-3918

Other

OtherInternational Conference on Parallel Processing, ICPP 2000
Country/TerritoryCanada
CityToronto
Period00/8/2100/8/24

Keywords

  • Code standards
  • Computer architecture
  • Data communication
  • Electronic mail
  • Fractals
  • Image coding
  • Image resolution
  • Neodymium
  • Parallel architectures
  • Pixel

ASJC Scopus subject areas

  • Software
  • Mathematics(all)
  • Hardware and Architecture

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