A novel SPRAM (SPin-transfer torque RAM)-based reconfigurable logic block for 3D-stacked reconfigurable spin processor

M. Sekikawa, K. Kiyoyama, H. Hasegawa, K. Miura, T. Fukushima, S. Ikeda, T. Tanaka, H. Ohno, M. Koyanagi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

11 Citations (Scopus)

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