A new vertical MOSFET "Vertical Logic Circuit (VLC) MOSFET" suppressing asymmetric characteristics and realizing an ultra compact and robust logic circuit

Koji Sakui; Tetsuo Endoh

doi:10.1016/j.sse.2010.06.005

A new vertical MOSFET "Vertical Logic Circuit (VLC) MOSFET" suppressing asymmetric characteristics and realizing an ultra compact and robust logic circuit

Koji Sakui, Tetsuo Endoh

ENG - Electrical Engineering

Research output: Contribution to journal › Article › peer-review

10 Citations (Scopus)

Abstract

The asymmetric characteristics of the conventional vertical MOSFET are examined. To reduce the IR drop influences of the diffusion resistance for the vertical MOSFET, a new vertical MOSFET for the Vertical Logic Circuit (VLC) configuration, which separates the current paths of small currents from large currents, has been proposed.

Original language	English
Pages (from-to)	1457-1462
Number of pages	6
Journal	Solid-State Electronics
Volume	54
Issue number	11
DOIs	https://doi.org/10.1016/j.sse.2010.06.005
Publication status	Published - 2010 Nov 1

Keywords

Asymmetric characteristics
Back-bias effect
MOSFET
Pillar
Vertical

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Condensed Matter Physics
Electrical and Electronic Engineering
Materials Chemistry

Access to Document

10.1016/j.sse.2010.06.005

Cite this

@article{c3f5062989c649cf886aab20a69bf1b5,

title = "A new vertical MOSFET {"}Vertical Logic Circuit (VLC) MOSFET{"} suppressing asymmetric characteristics and realizing an ultra compact and robust logic circuit",

abstract = "The asymmetric characteristics of the conventional vertical MOSFET are examined. To reduce the IR drop influences of the diffusion resistance for the vertical MOSFET, a new vertical MOSFET for the Vertical Logic Circuit (VLC) configuration, which separates the current paths of small currents from large currents, has been proposed.",

keywords = "Asymmetric characteristics, Back-bias effect, MOSFET, Pillar, Vertical",

author = "Koji Sakui and Tetsuo Endoh",

year = "2010",

month = nov,

day = "1",

doi = "10.1016/j.sse.2010.06.005",

language = "English",

volume = "54",

pages = "1457--1462",

journal = "Solid-State Electronics",

issn = "0038-1101",

publisher = "Elsevier Limited",

number = "11",

}

TY - JOUR

T1 - A new vertical MOSFET "Vertical Logic Circuit (VLC) MOSFET" suppressing asymmetric characteristics and realizing an ultra compact and robust logic circuit

AU - Sakui, Koji

AU - Endoh, Tetsuo

PY - 2010/11/1

Y1 - 2010/11/1

N2 - The asymmetric characteristics of the conventional vertical MOSFET are examined. To reduce the IR drop influences of the diffusion resistance for the vertical MOSFET, a new vertical MOSFET for the Vertical Logic Circuit (VLC) configuration, which separates the current paths of small currents from large currents, has been proposed.

AB - The asymmetric characteristics of the conventional vertical MOSFET are examined. To reduce the IR drop influences of the diffusion resistance for the vertical MOSFET, a new vertical MOSFET for the Vertical Logic Circuit (VLC) configuration, which separates the current paths of small currents from large currents, has been proposed.

KW - Asymmetric characteristics

KW - Back-bias effect

KW - MOSFET

KW - Pillar

KW - Vertical

UR - http://www.scopus.com/inward/record.url?scp=77955657556&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=77955657556&partnerID=8YFLogxK

U2 - 10.1016/j.sse.2010.06.005

DO - 10.1016/j.sse.2010.06.005

M3 - Article

AN - SCOPUS:77955657556

VL - 54

SP - 1457

EP - 1462

JO - Solid-State Electronics

JF - Solid-State Electronics

SN - 0038-1101

IS - 11

ER -

A new vertical MOSFET "Vertical Logic Circuit (VLC) MOSFET" suppressing asymmetric characteristics and realizing an ultra compact and robust logic circuit

Abstract

Keywords

ASJC Scopus subject areas

Access to Document

Other files and links

Fingerprint

Cite this