A memory congestion-aware MPI Process Placement for Modern NUMA Systems

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Citations (Scopus)

Abstract

MPI process placement is an important step to achieve scalable performance on modern non-uniform memory access (NUMA) systems. A recent study on NUMA architectures has shown that, on modern NUMA systems, the memory congestion problem could cause more severe performance degradation than the data locality problem because heavy congestion on memory controllers could cause long latencies. However, conventional work on MPI process placement has focused on locality to minimize the remote-access communication. Moreover, maximizing the locality may actually degrade performance because the load imbalance among nodes in a modern NUMA system may increase. Thus, a process placement algorithm must be designed to consider memory congestion. In this paper, a method to reconcile both the locality and the memory congestion on modern NUMA systems is proposed. This method statically analyzes the application communication pattern to optimize the process placement. A data clustering method is applied to the time-series data of the MPI communications in order to identify data traffics that potentially cause memory congestion. The proposed method has been evaluated with the NPB kernels on a real NUMA system and a simulation environment. Experimental results show that the proposed method can achieve 1.6x performance improvement compared with the current state-of-the-art strategy.

Original languageEnglish
Title of host publicationProceedings - 24th IEEE International Conference on High Performance Computing, HiPC 2017
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages152-161
Number of pages10
ISBN (Electronic)9781538622933
DOIs
Publication statusPublished - 2018 Feb 7
Event24th IEEE International Conference on High Performance Computing, HiPC 2017 - Jaipur, India
Duration: 2017 Dec 182017 Dec 21

Publication series

NameProceedings - 24th IEEE International Conference on High Performance Computing, HiPC 2017
Volume2017-December

Other

Other24th IEEE International Conference on High Performance Computing, HiPC 2017
CountryIndia
CityJaipur
Period17/12/1817/12/21

Keywords

  • Congestion
  • High Performance Computing
  • Many-Core
  • NUMA
  • Process Placement

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Hardware and Architecture
  • Modelling and Simulation

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  • Cite this

    Agung, M., Amrizal, M. A., Komatsu, K., Egawa, R., & Takizawa, H. (2018). A memory congestion-aware MPI Process Placement for Modern NUMA Systems. In Proceedings - 24th IEEE International Conference on High Performance Computing, HiPC 2017 (pp. 152-161). (Proceedings - 24th IEEE International Conference on High Performance Computing, HiPC 2017; Vol. 2017-December). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/HiPC.2017.00026