A low-power MTJ-based nonvolatile FPGA using self-terminated logic-in-memory structure

Daisuke Suzuki, Takahiro Hanyu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

A nonvolatile field-programmable gate array (NVFPGA), where both magnetic tunnel junction (MTJ) devices and greedy power-saving techniques are utilized, is proposed. Because the circuit components are shared among several MTJ devices by the use of logic-in-memory (LIM) structure, the number of leakage current paths is reduced, which results in leakage power reduction during power-on. Moreover, the use of the self-termination scheme, which automatically turns off the write current immediately after the desired data is written, makes it possible to minimize power consumption during the backup operation. In fact, the proposed NVFPGA exhibits a 90 % power reduction in comparison with that of a conventional SRAM-based FPGA under typical benchmark-circuit implementations.

Original languageEnglish
Title of host publicationFPL 2016 - 26th International Conference on Field-Programmable Logic and Applications
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9782839918442
DOIs
Publication statusPublished - 2016 Sep 26
Event26th International Conference on Field-Programmable Logic and Applications, FPL 2016 - Lausanne, Switzerland
Duration: 2016 Aug 292016 Sep 2

Publication series

NameFPL 2016 - 26th International Conference on Field-Programmable Logic and Applications

Other

Other26th International Conference on Field-Programmable Logic and Applications, FPL 2016
CountrySwitzerland
CityLausanne
Period16/8/2916/9/2

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Computer Science Applications
  • Control and Optimization

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