TY - GEN
T1 - A low power motion estimation engine with adaptive bit-shifted SAD calculation
AU - Onishi, Takayuki
AU - Omori, Yuya
AU - Nakamura, Ken
AU - Iwasaki, Hiroe
AU - Shimizu, Atsushi
N1 - Publisher Copyright:
© 2019 IEEE
PY - 2019
Y1 - 2019
N2 - This paper describes a motion estimation (ME) engine that achieves both power efficiency and coding quality for real-time ultra-high definition video encoders. Sum of absolute difference (SAD) calculations are performed with bit-shortened SAD engines to reduce power, and bit extraction positions are adaptively shifted in accordance with the flatness of picture luminance values to maintain calculation precision. Power simulations with a High Efficiency Video Coding encoder LSI design [2] show that the ME engine reduces power consumption by 18-39% with 4-bit shortened SAD calculation, while coding efficiency loss is suppressed by up to 57% with adaptive bit-shifting. The ME engine is especially effective for high dynamic range pictures with downscaled luminance values, which are suitable for today's 4K and 8K video contents.
AB - This paper describes a motion estimation (ME) engine that achieves both power efficiency and coding quality for real-time ultra-high definition video encoders. Sum of absolute difference (SAD) calculations are performed with bit-shortened SAD engines to reduce power, and bit extraction positions are adaptively shifted in accordance with the flatness of picture luminance values to maintain calculation precision. Power simulations with a High Efficiency Video Coding encoder LSI design [2] show that the ME engine reduces power consumption by 18-39% with 4-bit shortened SAD calculation, while coding efficiency loss is suppressed by up to 57% with adaptive bit-shifting. The ME engine is especially effective for high dynamic range pictures with downscaled luminance values, which are suitable for today's 4K and 8K video contents.
KW - HEVC
KW - Motion estimation
KW - UHDTV
KW - Video coding
UR - http://www.scopus.com/inward/record.url?scp=85066779030&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85066779030&partnerID=8YFLogxK
U2 - 10.1109/ISCAS.2019.8702287
DO - 10.1109/ISCAS.2019.8702287
M3 - Conference contribution
AN - SCOPUS:85066779030
T3 - Proceedings - IEEE International Symposium on Circuits and Systems
BT - 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019
Y2 - 26 May 2019 through 29 May 2019
ER -