Abstract
Magnetic tunnel junction (MTJ), a spintronics device, offers nonvolatile memory capable of fast-read/write with high endurance together with back end of the line (BEOL) compatibility. These features combined with the CMOS technology offer not only a non-volatile, high density, and fast random access memory, but also a possibility of constructing a CMOS logic circuit having unprecedented low power capability and compactness. I describe here the development of MTJ, in particular the giant tunnel magnetoresistance of MgO-barrier MTJ and current-induced magnetization switching, basic hybrid CMOS/MTJ circuits, and prospects of the current approach along with the remaining challenges.
| Original language | English |
|---|---|
| Title of host publication | 2009 Symposium on VLSI Technology, VLSIT 2009 |
| Pages | 122-123 |
| Number of pages | 2 |
| Publication status | Published - 2009 Nov 16 |
| Event | 2009 Symposium on VLSI Technology, VLSIT 2009 - Kyoto, Japan Duration: 2009 Jun 16 → 2009 Jun 18 |
Publication series
| Name | Digest of Technical Papers - Symposium on VLSI Technology |
|---|---|
| ISSN (Print) | 0743-1562 |
Other
| Other | 2009 Symposium on VLSI Technology, VLSIT 2009 |
|---|---|
| Country | Japan |
| City | Kyoto |
| Period | 09/6/16 → 09/6/18 |
Keywords
- Hybrid MTJ/CMOS
- Logic-in-memory circuit
- MTJ
- Nonvolatility
- Spintronics
ASJC Scopus subject areas
- Electrical and Electronic Engineering
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Cite this
Ohno, H. (2009). A hybrid CMOS/magnetic tunnel junction approach for nonvolatile integrated circuits. In 2009 Symposium on VLSI Technology, VLSIT 2009 (pp. 122-123). [5200657] (Digest of Technical Papers - Symposium on VLSI Technology).