A high output resistance 1.2-V VDD current mirror with deep submicron vertical mosfets

Satoru Tanoi, Tetsuo Endoh

Research output: Contribution to journalArticlepeer-review

1 Citation (Scopus)

Abstract

A low VDD current mirror with deep sub-micron vertical MOSFETs is presented. The keys are new bias circuits to reduce both the minimum VDD for the operation and the sensitivity of the output current on VDD. In the simulation, our circuits reduce the minimum VDD by about 17% and the VDD sensitivity by one order both from those of the conventional. In the simulation with 90 nm φ vertical MOSFET approximate models, our circuit shows about 4MΩ output resistance at 1.2-V VDD with the small temperature dependence, which is about six times as large as that with planar MOSFETs.

Original languageEnglish
Pages (from-to)423-430
Number of pages8
JournalIEICE Transactions on Electronics
VolumeE97-C
Issue number5
DOIs
Publication statusPublished - 2014 May

Keywords

  • Current mirror
  • Low VDD
  • Output resistance
  • Short channel effect
  • Vertical MOSFET

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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