For small size and low cost mobile terminals on millimeter wave radio communication, we design and fabricate 60 GHz-band broadband power amplifier (PA) using a 90 nm silicon complementary metal oxide semiconductor (Si-CMOS) process. In designing high linear gain PA, transistor size optimization method of PA is used. Target output power is 7 dBm in single-end and 10 dBm in push-pull structure. With the transistor size optimization method, unit gate width is 2 μm and a number of gate fingers is 32, so total optimal gate width is 64 m. We fabricate the single-end PA and push-pull PA designed with this transistor size. The single-end PA has achieved 1 dB compression output power P 1dB of 7.3 dBm, saturation power P sat of 10.2 dBm, linear gain G L of 10.9 dB, peak power added efficiency PAE of 21.3% at 63 GHz, and a bandwidth over 7 dBm of 9 GHz. The push-pull PA has achieved P 1dB of 10.2 dBm, P sat of 12.9 dBm, G L of 13.1 dB, peak PAE of 25.4% at 63 GHz, and a bandwidth over 10 dBm of 10 GHz. These measurement results show the potentiality of high efficiency Si-CMOS PA for 60 GHz band broadband wireless communication applications.