A High-Density NAND EEPROM with Block-Page Programming for Microcomputer Applications

Yoshihisa Iwata; Masaki Momodomi; Tomoharu Tanaka; Hideko Oodaira; Yasuo Itoh; Ryozo Nakayama; Ryouhei Kirisawa; Seiichi Aritome; Tetsuo Endoh; Riichiro Shirota; Kazunori Ohuchi; Fuji Masuoka

doi:10.1109/4.52165

A High-Density NAND EEPROM with Block-Page Programming for Microcomputer Applications

Yoshihisa Iwata, Masaki Momodomi, Tomoharu Tanaka, Hideko Oodaira, Yasuo Itoh, Ryozo Nakayama, Ryouhei Kirisawa, Seiichi Aritome, Tetsuo Endoh, Riichiro Shirota, Kazunori Ohuchi, Fuji Masuoka

Research output: Contribution to journal › Article

16 Citations (Scopus)

Abstract

A 5-V-only CMOS 4-Mb NAND EEPROM with high-speed block-page programming circuits and on-chip test circuits for evaluating the NAND-structured cell is described. This high-density EEPROM has successfully demonstrated the applicability of these techniques for micro-computer applications, which require a large nonvolatile memory system with low power consumption. 0018-9200/90/0400-0417$01.00

Original language	English
Pages (from-to)	417-424
Number of pages	8
Journal	IEEE Journal of Solid-State Circuits
Volume	25
Issue number	2
DOIs	https://doi.org/10.1109/4.52165
Publication status	Published - 1990 Apr
Externally published	Yes

ASJC Scopus subject areas

Electrical and Electronic Engineering

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10.1109/4.52165

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Iwata, Y., Momodomi, M., Tanaka, T., Oodaira, H., Itoh, Y., Nakayama, R., Kirisawa, R., Aritome, S., Endoh, T., Shirota, R., Ohuchi, K., & Masuoka, F. (1990). A High-Density NAND EEPROM with Block-Page Programming for Microcomputer Applications. IEEE Journal of Solid-State Circuits, 25(2), 417-424. https://doi.org/10.1109/4.52165

A High-Density NAND EEPROM with Block-Page Programming for Microcomputer Applications. / Iwata, Yoshihisa; Momodomi, Masaki; Tanaka, Tomoharu; Oodaira, Hideko; Itoh, Yasuo; Nakayama, Ryozo; Kirisawa, Ryouhei; Aritome, Seiichi; Endoh, Tetsuo; Shirota, Riichiro; Ohuchi, Kazunori; Masuoka, Fuji.

In: IEEE Journal of Solid-State Circuits, Vol. 25, No. 2, 04.1990, p. 417-424.

Research output: Contribution to journal › Article

Iwata, Yoshihisa ; Momodomi, Masaki ; Tanaka, Tomoharu ; Oodaira, Hideko ; Itoh, Yasuo ; Nakayama, Ryozo ; Kirisawa, Ryouhei ; Aritome, Seiichi ; Endoh, Tetsuo ; Shirota, Riichiro ; Ohuchi, Kazunori ; Masuoka, Fuji. / A High-Density NAND EEPROM with Block-Page Programming for Microcomputer Applications. In: IEEE Journal of Solid-State Circuits. 1990 ; Vol. 25, No. 2. pp. 417-424.

@article{1c5e8b0f668342179fcd3d2e3703a7ed,

title = "A High-Density NAND EEPROM with Block-Page Programming for Microcomputer Applications",

abstract = "A 5-V-only CMOS 4-Mb NAND EEPROM with high-speed block-page programming circuits and on-chip test circuits for evaluating the NAND-structured cell is described. This high-density EEPROM has successfully demonstrated the applicability of these techniques for micro-computer applications, which require a large nonvolatile memory system with low power consumption. 0018-9200/90/0400-0417$01.00",

author = "Yoshihisa Iwata and Masaki Momodomi and Tomoharu Tanaka and Hideko Oodaira and Yasuo Itoh and Ryozo Nakayama and Ryouhei Kirisawa and Seiichi Aritome and Tetsuo Endoh and Riichiro Shirota and Kazunori Ohuchi and Fuji Masuoka",

year = "1990",

month = apr,

doi = "10.1109/4.52165",

language = "English",

volume = "25",

pages = "417--424",

journal = "IEEE Journal of Solid-State Circuits",

issn = "0018-9200",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "2",

}

TY - JOUR

T1 - A High-Density NAND EEPROM with Block-Page Programming for Microcomputer Applications

AU - Iwata, Yoshihisa

AU - Momodomi, Masaki

AU - Tanaka, Tomoharu

AU - Oodaira, Hideko

AU - Itoh, Yasuo

AU - Nakayama, Ryozo

AU - Kirisawa, Ryouhei

AU - Aritome, Seiichi

AU - Endoh, Tetsuo

AU - Shirota, Riichiro

AU - Ohuchi, Kazunori

AU - Masuoka, Fuji

PY - 1990/4

Y1 - 1990/4

N2 - A 5-V-only CMOS 4-Mb NAND EEPROM with high-speed block-page programming circuits and on-chip test circuits for evaluating the NAND-structured cell is described. This high-density EEPROM has successfully demonstrated the applicability of these techniques for micro-computer applications, which require a large nonvolatile memory system with low power consumption. 0018-9200/90/0400-0417$01.00

AB - A 5-V-only CMOS 4-Mb NAND EEPROM with high-speed block-page programming circuits and on-chip test circuits for evaluating the NAND-structured cell is described. This high-density EEPROM has successfully demonstrated the applicability of these techniques for micro-computer applications, which require a large nonvolatile memory system with low power consumption. 0018-9200/90/0400-0417$01.00

UR - http://www.scopus.com/inward/record.url?scp=0025419523&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0025419523&partnerID=8YFLogxK

U2 - 10.1109/4.52165

DO - 10.1109/4.52165

M3 - Article

AN - SCOPUS:0025419523

VL - 25

SP - 417

EP - 424

JO - IEEE Journal of Solid-State Circuits

JF - IEEE Journal of Solid-State Circuits

SN - 0018-9200

IS - 2

ER -