Researchers in many advanced R&D and scientific instrumentation fields must analyze high-speed phenomena through the use of high-speed video cameras with over 1Mfps. Conventional image sensors are mainly rolling-shutter continuous CMOS image sensors that repeat exposure and read-out signals quickly for every frame . A global shutter is a necessity in this field because objects move very fast. Recently, global shutter CMOS image sensors with column-parallel ADCs  or analog parallel-output circuits  have been reported. A higher frame rate can be achieved by reducing the number of pixels. Consequently, the read-out speed, namely the frame rate times the number of pixels, is limited at around 10Gpixel/s in the conventional global-shutter CMOS image sensors. To improve the read-out speed, global-shutter burst CCD image sensors with multiple storage CCD memories for storing image signals near the photodiode in each pixel have been reported . The image sensor in  achieves 1Tpixel/s; however it has issues such as high heat generation due to driving large CCD capacitors simultaneously, an inability to achieve continuous operation, and a decrease of charge capacity at near-maximum frame rates. A prototype global-shutter CMOS image sensor that has multiple on-chip memories is reported in . This sensor achieves both 23Gpixel/s burst operation without cooling and 23Mpixel/s continuous operation on a single chip. This paper presents a 400 Hx256 V pixel CMOS image sensor including 128 on-chip memory/pixel with 1Tpixel/s in burst operation without cooling and 780Mpixel/s in continuous operation. To improve the read-out speed from the chip, a noise-reduction circuit in pixel and relay buffers is introduced.