This paper presents a generic object-oriented framework of Evolutionary Graph Generation (EGG) for automated arithmetic circuit synthesis. The EGG system can be systematically modified for different design problems by inheriting the framework class templetes. The potential of the framework is examined through experimental synethesis of bit-serial arithmetic circuits.
|Journal||Proceedings - IEEE International Symposium on Circuits and Systems|
|Publication status||Published - 2003 Jul 14|
|Event||Proceedings of the 2003 IEEE International Symposium on Circuits and Systems - Bangkok, Thailand|
Duration: 2003 May 25 → 2003 May 28
ASJC Scopus subject areas
- Electrical and Electronic Engineering