A fast hardware/software co-verification method for System-On-a-Chip by using a C/C++ simulator and FPGA emulator with shared register communication

Yuichi Nakamura, Kouhei Hosokawa, Ichiro Kuroda, Ko Yoshikawa, Takeshi Yoshimura

Research output: Contribution to journalConference articlepeer-review

55 Citations (Scopus)

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Engineering & Materials Science