A dynamically reconfigurable IP for data-intensive applications

Naoto Miyamoto; Leo Karnan; Koji Kotani; Tadahiro Ohmi

A dynamically reconfigurable IP for data-intensive applications

Naoto Miyamoto, Leo Karnan, Koji Kotani, Tadahiro Ohmi

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

In this paper, we introduce a report on designing an ASIC which includes a dynamically reconfigurable IP that can change composition within a clock cycle. Empirical design TAT evaluations were made and the results showed that a data-intensive processor equipped with this IP can be designed in 4 weeks.

Original language	English
Title of host publication	Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits
Pages	404-405
Number of pages	2
Publication status	Published - 2004 Dec 1
Event	Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits - Fukuoka, Japan Duration: 2004 Aug 4 → 2004 Aug 5

Publication series

Name	Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits

Other

Other	Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits
Country	Japan
City	Fukuoka
Period	04/8/4 → 04/8/5

ASJC Scopus subject areas

Engineering(all)

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Cite this

A dynamically reconfigurable IP for data-intensive applications. / Miyamoto, Naoto; Karnan, Leo; Kotani, Koji; Ohmi, Tadahiro.

Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits. 2004. p. 404-405 (Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Miyamoto, N, Karnan, L, Kotani, K & Ohmi, T 2004, A dynamically reconfigurable IP for data-intensive applications. in Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits. Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits, pp. 404-405, Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits, Fukuoka, Japan, 04/8/4.

@inproceedings{a9962c924f914ae3ac6fe85c12a8a064,

title = "A dynamically reconfigurable IP for data-intensive applications",

abstract = "In this paper, we introduce a report on designing an ASIC which includes a dynamically reconfigurable IP that can change composition within a clock cycle. Empirical design TAT evaluations were made and the results showed that a data-intensive processor equipped with this IP can be designed in 4 weeks.",

author = "Naoto Miyamoto and Leo Karnan and Koji Kotani and Tadahiro Ohmi",

year = "2004",

month = dec,

day = "1",

language = "English",

isbn = "078038637X",

series = "Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits",

pages = "404--405",

booktitle = "Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits",

note = "Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits ; Conference date: 04-08-2004 Through 05-08-2004",

}

TY - GEN

T1 - A dynamically reconfigurable IP for data-intensive applications

AU - Miyamoto, Naoto

AU - Karnan, Leo

AU - Kotani, Koji

AU - Ohmi, Tadahiro

PY - 2004/12/1

Y1 - 2004/12/1

N2 - In this paper, we introduce a report on designing an ASIC which includes a dynamically reconfigurable IP that can change composition within a clock cycle. Empirical design TAT evaluations were made and the results showed that a data-intensive processor equipped with this IP can be designed in 4 weeks.

AB - In this paper, we introduce a report on designing an ASIC which includes a dynamically reconfigurable IP that can change composition within a clock cycle. Empirical design TAT evaluations were made and the results showed that a data-intensive processor equipped with this IP can be designed in 4 weeks.

UR - http://www.scopus.com/inward/record.url?scp=14544292051&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=14544292051&partnerID=8YFLogxK

M3 - Conference contribution

AN - SCOPUS:14544292051

SN - 078038637X

T3 - Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits

SP - 404

EP - 405

BT - Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits

T2 - Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits

Y2 - 4 August 2004 through 5 August 2004

ER -