A disturbance-free read scheme and a compact stochastic-spin-dynamics-based MTJ circuit model for Gb-scale SPRAM

K. Ono, T. Kawahara, R. Takemura, K. Miura, H. Yamamoto, Michihiko Yamanouchi, J. Hayakawa, Kenchi Ito, H. Takahashi, S. Ikeda, H. Hasegawa, H. Matsuoka, H. Ohno

Research output: Chapter in Book/Report/Conference proceedingConference contribution

31 Citations (Scopus)

Abstract

A magnetic-tunnel-junction (MTJ) circuit model, which considers spin dynamics under finite temperature, electrical bias, a stochastic process, and spin-transfer torque, was developed. Switching behaviors simulated by this model were verified by experimental measurements. Moreover, a disturbance-free read scheme for Gbit-scale spin-transfer torque RAM (SPRAM) was also developed. The feasibility of this scheme was confirmed by circuit simulation using the model and on-chip measurement of switching probability.

Original languageEnglish
Title of host publication2009 International Electron Devices Meeting, IEDM 2009 - Technical Digest
DOIs
Publication statusPublished - 2009 Dec 1
Event2009 International Electron Devices Meeting, IEDM 2009 - Baltimore, MD, United States
Duration: 2009 Dec 72009 Dec 9

Publication series

NameTechnical Digest - International Electron Devices Meeting, IEDM
ISSN (Print)0163-1918

Other

Other2009 International Electron Devices Meeting, IEDM 2009
CountryUnited States
CityBaltimore, MD
Period09/12/709/12/9

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Electrical and Electronic Engineering
  • Materials Chemistry

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