A design of a Capacitorless 1T-DRAM Cell Using Gate-induced Drain Leakage (GIDL) Current for Low-power and High-speed Embedded Memory

Eiji Yoshida, Tetsu Tanaka

Research output: Contribution to journalConference articlepeer-review

19 Citations (Scopus)

Abstract

A capacitorless 1T-DRAM cell using gate-induced drain leakage (GIDL) current for write operation was demonstrated for the first time. Compared with the conventional write operation with impact ionization current, write operation with GIDL current provides low-power and high-speed operation. The capacitorless 1T-DRAM is the most promising technology for high performance embedded DRAM LSI.

Original languageEnglish
Pages (from-to)913-916
Number of pages4
JournalTechnical Digest - International Electron Devices Meeting
Publication statusPublished - 2003 Dec 1
Externally publishedYes
EventIEEE International Electron Devices Meeting - Washington, DC, United States
Duration: 2003 Dec 82003 Dec 10

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Electrical and Electronic Engineering
  • Materials Chemistry

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