A Convolutional Neural Network VLSI Architecture Using Thresholding and Weight Decomposition

Osamu Nomura, Takashi Morie, Keisuke Korekado, Masakazu Matsugu, Atsushi Iwata

Research output: Chapter in Book/Report/Conference proceedingChapter

2 Citations (Scopus)

Abstract

Hierarchical convolutional neural networks are a well-known robust image-recognition model. In order to apply this model to robot vision or various intelligent real-time vision systems, its VLSI implementation is essential. This paper proposes a new algorithm for reducing multiply-and-accumulation operation by thresholding in a projection field and by performing weight decomposition in a 2-D neuron array. We also propose a VLSI architecture based on the proposed algorithm, and estimate its operation performance.

Original languageEnglish
Title of host publicationLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
EditorsMircea Gh. Negoita, Robert J. Howlett, Lakhmi C. Jain
PublisherSpringer Verlag
Pages995-1001
Number of pages7
ISBN (Print)9783540301325
DOIs
Publication statusPublished - 2004
Externally publishedYes

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume3213
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349

ASJC Scopus subject areas

  • Theoretical Computer Science
  • Computer Science(all)

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