A comparison of retrograde and conventional N-wells for sub-micron CMOS circuits

A. G. Lewis, R. A. Martin, J. Y. Chen, T. Y. Huang, M. Koyanagi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

A general and direct comparison of retrograde and conventional n-well CMOS technologies is reported. The advantages of the retrograde structures in terms of packing density, isolation and short channel PMOS characteristics are demonstrated. The conventional wells offer slightly better circuit performance due to lower p + to n-well junction capacitance. However, the major difference between the well types lies in their latchup susceptibility: here the retrograde wells have a significant advantage due to their lower sheet resistance and greater tolerance to very thin p-on-p + epitaxial layers.

Original languageEnglish
Title of host publicationESSDERC 1987 - 17th European Solid State Device Research Conference
PublisherIEEE Computer Society
Pages581-584
Number of pages4
ISBN (Electronic)0444704779
ISBN (Print)9780444704771
Publication statusPublished - 1987 Jan 1
Event17th European Solid State Device Research Conference, ESSDERC 1987 - Bologna, Italy
Duration: 1987 Sep 141987 Sep 17

Publication series

NameEuropean Solid-State Device Research Conference
ISSN (Print)1930-8876

Other

Other17th European Solid State Device Research Conference, ESSDERC 1987
CountryItaly
CityBologna
Period87/9/1487/9/17

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Safety, Risk, Reliability and Quality

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  • Cite this

    Lewis, A. G., Martin, R. A., Chen, J. Y., Huang, T. Y., & Koyanagi, M. (1987). A comparison of retrograde and conventional N-wells for sub-micron CMOS circuits. In ESSDERC 1987 - 17th European Solid State Device Research Conference (pp. 581-584). [5436690] (European Solid-State Device Research Conference). IEEE Computer Society.