TY - GEN
T1 - A CMOS nonlinear-map circuit array for threshold-coupled chaotic maps using pulse-modulation approach
AU - Morie, Takashi
AU - Atuti, Daisuke
AU - Ifuku, Kazuki
AU - Horio, Yoshihiko
AU - Aihara, Kazuyuki
PY - 2011/11/7
Y1 - 2011/11/7
N2 - As one of adaptive lattice dynamics, a nonlinear dynamical model with threshold activated coupling has been proposed by S. Sinha since 1994. In this model, each lattice site performs an arbitrary nonlinear transformation and thresholding. The excess of an output over the threshold is transported to the neighboring lattice site(s). This dynamics generates various spatiotemporal patterns. S. Sinha, et al. have also proposed the applications of this model to computing using nonlinear dynamics. In this paper, we propose a CMOS LSI chip designed using a pulse modulation approach for this model. The chip includes 30x30 nonlinear-map element circuits, each of which corresponds to a lattice site. The measurement results using the fabricated LSI chip demonstrate that the designed circuit successfully performs arbitrary nonlinear transformation and thresholding.
AB - As one of adaptive lattice dynamics, a nonlinear dynamical model with threshold activated coupling has been proposed by S. Sinha since 1994. In this model, each lattice site performs an arbitrary nonlinear transformation and thresholding. The excess of an output over the threshold is transported to the neighboring lattice site(s). This dynamics generates various spatiotemporal patterns. S. Sinha, et al. have also proposed the applications of this model to computing using nonlinear dynamics. In this paper, we propose a CMOS LSI chip designed using a pulse modulation approach for this model. The chip includes 30x30 nonlinear-map element circuits, each of which corresponds to a lattice site. The measurement results using the fabricated LSI chip demonstrate that the designed circuit successfully performs arbitrary nonlinear transformation and thresholding.
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U2 - 10.1109/ECCTD.2011.6043293
DO - 10.1109/ECCTD.2011.6043293
M3 - Conference contribution
AN - SCOPUS:80155193174
SN - 9781457706189
T3 - 2011 20th European Conference on Circuit Theory and Design, ECCTD 2011
SP - 126
EP - 129
BT - 2011 20th European Conference on Circuit Theory and Design, ECCTD 2011
T2 - 2011 20th European Conference on Circuit Theory and Design, ECCTD 2011
Y2 - 29 August 2011 through 31 August 2011
ER -