TY - GEN
T1 - A CMOS image sensor with 2.5-e- random noise and 110-ke - full well capacity using column source follower readout circuits
AU - Kohara, Takahiro
AU - Lee, Woonghee
AU - Akahane, Nana
AU - Mizobuchi, Koichi
AU - Sugawa, Shigetoshi
PY - 2009/11/18
Y1 - 2009/11/18
N2 - A low noise CMOS image sensor without degradation of saturation performance has been developed by using column amplifiers of the gains of about 1.0 in a lateral overflow integration capacitor technology. The 1/4-inch, 4.5-μm pitch, 800H × 600V pixels CMOS image sensor fabricated by a 0.18-μm 2P3M technology including a buried pinned photo-diode structure has achieved fully linear response, 0.98 column readout gain, 100-μV/e - conversion gain, 2.5-e- random noise, 110,000-e - full well capacity and 93-dB dynamic range in one exposure.
AB - A low noise CMOS image sensor without degradation of saturation performance has been developed by using column amplifiers of the gains of about 1.0 in a lateral overflow integration capacitor technology. The 1/4-inch, 4.5-μm pitch, 800H × 600V pixels CMOS image sensor fabricated by a 0.18-μm 2P3M technology including a buried pinned photo-diode structure has achieved fully linear response, 0.98 column readout gain, 100-μV/e - conversion gain, 2.5-e- random noise, 110,000-e - full well capacity and 93-dB dynamic range in one exposure.
KW - CMOS image sensor
KW - Column amplifier
KW - Full well capacity and lateral overflow integration
KW - Noise
UR - http://www.scopus.com/inward/record.url?scp=70449359537&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=70449359537&partnerID=8YFLogxK
M3 - Conference contribution
AN - SCOPUS:70449359537
SN - 9784863480018
T3 - IEEE Symposium on VLSI Circuits, Digest of Technical Papers
SP - 182
EP - 183
BT - 2009 Symposium on VLSI Circuits
T2 - 2009 Symposium on VLSI Circuits
Y2 - 16 June 2009 through 18 June 2009
ER -