A 512kB embedded phase change memory with 416kB/s write throughput at 100μA cell write current

Satoru Hanzawa, Naoki Kitai, Kenichi Osada, Akira Kotabe, Yuichi Matsui, Nozomu Matsuzaki, Norikatsu Takaura, Masahiro Moniwa, Takayuki Kawahara

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    45 Citations (Scopus)

    Abstract

    An experimental 512kB embedded PCM uses a current-saving architecture in a 0.13μm 1.5V CMOS. The write scheme features a low-write-current resistive device and achieves 416kB/s write-throughput at 100μA cell current. A charge-transfer direct-sense scheme has a 16b parallel read access time of 9.9ns in an array drawing 280μA. A standby voltage scheme suppresses leakage current in the cell current path and increases the measured PCM cell resistance from 3 to 33MΩ.

    Original languageEnglish
    Title of host publication2007 IEEE International Solid-State Circuits Conference, ISSCC - Digest of Technical Papers
    Pages474-475+616+471
    DOIs
    Publication statusPublished - 2007 Sep 27
    Event54th IEEE International Solid-State Circuits Conference, ISSCC 2007 - San Francisco, CA, United States
    Duration: 2007 Feb 112007 Feb 15

    Publication series

    NameDigest of Technical Papers - IEEE International Solid-State Circuits Conference
    ISSN (Print)0193-6530

    Other

    Other54th IEEE International Solid-State Circuits Conference, ISSCC 2007
    CountryUnited States
    CitySan Francisco, CA
    Period07/2/1107/2/15

    ASJC Scopus subject areas

    • Electronic, Optical and Magnetic Materials
    • Electrical and Electronic Engineering

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