TY - GEN
T1 - A 28 GHz-Band Direct RF Undersampling S/H CMOS IC with 40 dB SNR
AU - Yoshino, Nagahiro
AU - Norishima, Keita
AU - Motoyoshi, Mizuki
AU - Kameda, Suguru
AU - Suematsu, Noriharu
N1 - Funding Information:
ACKNOWLEDGEMENT This work is supported by the Ministry of Internal Affairs and Communications for the project entitled "R&D on Technolo-gies to Densely and Efficiently Utilize Radio Resources of Unlicensed Bands in Dedicated Areas.
Publisher Copyright:
© 2018 IEEE.
Copyright:
Copyright 2019 Elsevier B.V., All rights reserved.
PY - 2018/11/5
Y1 - 2018/11/5
N2 - We have studied direct RF undersampling reception to reduce the size and power consumption. We already developed a series/shunt switching type sample and hold (S/H) integrated circuit (IC) by using 90 nm complementary metal oxide semiconductor (CMOS) process for Ka-band (19.4-20.2 GHz) very small aperture terminal (VSAT) application. This IC performed signal-to-noise ratio (SNR) of higher than 27.3 dB. For the higher frequency operation and the reception of multi-level modulated signal, the SNR improvement will be required. In this paper, a 28 GHz-band S/H IC with higher SNR has been developed. In order to improve SNR at higher RF frequency, 65 nm CMOS process is introduced to enhance the switching speed of sampling, the size of hold capacitor is optimized and the two-stage output buffer amplifier is employed. The fabricated S/H IC performs the SNR of higher than 41.2 dB and the error vector magnitude (EVM) of 4.4% (32 Mbaud 64 quadrature amplitude modulation (QAM)) in 28 GHz-band.
AB - We have studied direct RF undersampling reception to reduce the size and power consumption. We already developed a series/shunt switching type sample and hold (S/H) integrated circuit (IC) by using 90 nm complementary metal oxide semiconductor (CMOS) process for Ka-band (19.4-20.2 GHz) very small aperture terminal (VSAT) application. This IC performed signal-to-noise ratio (SNR) of higher than 27.3 dB. For the higher frequency operation and the reception of multi-level modulated signal, the SNR improvement will be required. In this paper, a 28 GHz-band S/H IC with higher SNR has been developed. In order to improve SNR at higher RF frequency, 65 nm CMOS process is introduced to enhance the switching speed of sampling, the size of hold capacitor is optimized and the two-stage output buffer amplifier is employed. The fabricated S/H IC performs the SNR of higher than 41.2 dB and the error vector magnitude (EVM) of 4.4% (32 Mbaud 64 quadrature amplitude modulation (QAM)) in 28 GHz-band.
KW - CMOS
KW - Digital RF
KW - RFIC
KW - Receiver
KW - Sampling mixer
UR - http://www.scopus.com/inward/record.url?scp=85057727579&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85057727579&partnerID=8YFLogxK
U2 - 10.1109/RFIT.2018.8524070
DO - 10.1109/RFIT.2018.8524070
M3 - Conference contribution
AN - SCOPUS:85057727579
T3 - 2018 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2018
BT - 2018 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2018
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2018 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2018
Y2 - 15 August 2018 through 17 August 2018
ER -