A 200-μV/e- CMOS image sensor with 100-ke- full well capacity

Satoru Adachi, Woonghee Lee, Nana Akahane, Hiromichi Oshikubo, Koichi Mizobuchi, Shigetoshi Sugawa

Research output: Contribution to journalArticlepeer-review

26 Citations (Scopus)


A high-sensitivity CMOS image sensor keeping a high full-well capacity has been developed by introducing a new pixel having a small floating diffusion (FD) capacitance connected to a lateral overflow integration capacitor (LOFIC) through a MOS switch. The conceptual advantage of the small FD approach over conventional column amplifier approaches is compared and demonstrated. To ensure both the high sensitivity and the high full-well capacity, the low-light and the bright-light signals (S1 and S2) are output and reproduced without a visible SNR degradation at the S1/S2 switching point. As the most critical problem, the increase of the conversion gain variation in this approach is suppressed by applying a self-aligned offset structure to the small FD. A 1/4-in VGA format CMOS image sensor fabricated through 0.18-μm 2P3M process achieves 2.2-e -rms noise floor with 200-μV/e- conversion gain and 100-ke- full-well capacity.

Original languageEnglish
Pages (from-to)823-829
Number of pages7
JournalIEEE Journal of Solid-State Circuits
Issue number4
Publication statusPublished - 2008 Jan


  • CMOS image sensor
  • Dynamic range
  • Semiconductor device noise
  • Sensitivity

ASJC Scopus subject areas

  • Electrical and Electronic Engineering


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