A 16-Mb toggle MRAM with burst modes

Tadahiko Sugibayashi; Noboru Sakimura; Takeshi Honda; Kiyokazu Nagahara; Kiyotaka Tsuji; Hideaki Numata; Sadahiko Miura; Ken Ichi Shimura; Yuko Kato; Shinsaku Saito; Yoshiyuki Fukumoto; Hiroaki Honjo; Tetsuhiro Suzuki; Katsumi Suemitsu; Tomonori Mukai; Kaoru Mori; Ryusuke Nebashi; Shunsuke Fukami; Norikazu Ohshima; Hiromitsu Hada; Nobuyuki Ishiwata; Naoki Kasai; Shuichi Tahara

doi:10.1109/JSSC.2007.906195

A 16-Mb toggle MRAM with burst modes

Tadahiko Sugibayashi, Noboru Sakimura, Takeshi Honda, Kiyokazu Nagahara, Kiyotaka Tsuji, Hideaki Numata, Sadahiko Miura, Ken Ichi Shimura, Yuko Kato, Shinsaku Saito, Yoshiyuki Fukumoto, Hiroaki Honjo, Tetsuhiro Suzuki, Katsumi Suemitsu, Tomonori Mukai, Kaoru Mori, Ryusuke Nebashi, Shunsuke Fukami, Norikazu Ohshima, Hiromitsu HadaNobuyuki Ishiwata, Naoki Kasai, Shuichi Tahara

Research output: Contribution to journal › Article › peer-review

13 Citations (Scopus)

Abstract

This paper describes a recently developed 16-Mb toggle magnetic random access memory (MRAM). It has 100-MHz burst modes that are compatible with a pseudo-SRAM even though the toggle cell requires reading and comparing sequences in write modes. To accelerate operating clock frequency, we propose a distributed-driver wide-swing current-mirror scheme, an interleaved and pipelined memory-array group activation scheme, and a noise-insulation switch scheme. These circuit schemes compensate the toggle cell timing overhead in write modes and maintain write-current precision that is essential for the wide operational margin of MRAMs. Because toggle cells are very resistant to write disturbance errors, we designed the 16-Mb MRAM to include a toggle MRAM cell. The MRAM was fabricated with 0.13-μm CMOS and 0.24-μm MRAM processes with five metal layers.

Original language	English
Article number	4362112
Pages (from-to)	2378-2385
Number of pages	8
Journal	IEEE Journal of Solid-State Circuits
Volume	42
Issue number	11
DOIs	https://doi.org/10.1109/JSSC.2007.906195
Publication status	Published - 2007 Nov
Externally published	Yes

Keywords

Burst mode
Magnetic random access memory (MRAM)
Pseudo-SRAM
toggle cell

ASJC Scopus subject areas

Electrical and Electronic Engineering

Access to Document

10.1109/JSSC.2007.906195

Cite this

Sugibayashi, T., Sakimura, N., Honda, T., Nagahara, K., Tsuji, K., Numata, H., Miura, S., Shimura, K. I., Kato, Y., Saito, S., Fukumoto, Y., Honjo, H., Suzuki, T., Suemitsu, K., Mukai, T., Mori, K., Nebashi, R., Fukami, S., Ohshima, N., ... Tahara, S. (2007). A 16-Mb toggle MRAM with burst modes. IEEE Journal of Solid-State Circuits, 42(11), 2378-2385. [4362112]. https://doi.org/10.1109/JSSC.2007.906195

Sugibayashi, T, Sakimura, N, Honda, T, Nagahara, K, Tsuji, K, Numata, H, Miura, S, Shimura, KI, Kato, Y, Saito, S, Fukumoto, Y, Honjo, H, Suzuki, T, Suemitsu, K, Mukai, T, Mori, K, Nebashi, R, Fukami, S, Ohshima, N, Hada, H, Ishiwata, N, Kasai, N & Tahara, S 2007, 'A 16-Mb toggle MRAM with burst modes', IEEE Journal of Solid-State Circuits, vol. 42, no. 11, 4362112, pp. 2378-2385. https://doi.org/10.1109/JSSC.2007.906195

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abstract = "This paper describes a recently developed 16-Mb toggle magnetic random access memory (MRAM). It has 100-MHz burst modes that are compatible with a pseudo-SRAM even though the toggle cell requires reading and comparing sequences in write modes. To accelerate operating clock frequency, we propose a distributed-driver wide-swing current-mirror scheme, an interleaved and pipelined memory-array group activation scheme, and a noise-insulation switch scheme. These circuit schemes compensate the toggle cell timing overhead in write modes and maintain write-current precision that is essential for the wide operational margin of MRAMs. Because toggle cells are very resistant to write disturbance errors, we designed the 16-Mb MRAM to include a toggle MRAM cell. The MRAM was fabricated with 0.13-μm CMOS and 0.24-μm MRAM processes with five metal layers.",

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AU - Suzuki, Tetsuhiro

AU - Suemitsu, Katsumi

AU - Mukai, Tomonori

AU - Mori, Kaoru

AU - Nebashi, Ryusuke

AU - Fukami, Shunsuke

AU - Ohshima, Norikazu

AU - Hada, Hiromitsu

AU - Ishiwata, Nobuyuki

AU - Kasai, Naoki

AU - Tahara, Shuichi

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AB - This paper describes a recently developed 16-Mb toggle magnetic random access memory (MRAM). It has 100-MHz burst modes that are compatible with a pseudo-SRAM even though the toggle cell requires reading and comparing sequences in write modes. To accelerate operating clock frequency, we propose a distributed-driver wide-swing current-mirror scheme, an interleaved and pipelined memory-array group activation scheme, and a noise-insulation switch scheme. These circuit schemes compensate the toggle cell timing overhead in write modes and maintain write-current precision that is essential for the wide operational margin of MRAMs. Because toggle cells are very resistant to write disturbance errors, we designed the 16-Mb MRAM to include a toggle MRAM cell. The MRAM was fabricated with 0.13-μm CMOS and 0.24-μm MRAM processes with five metal layers.

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A 16-Mb toggle MRAM with burst modes

Abstract

Keywords

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