A 16-Mb toggle MRAM with burst modes

Tadahiko Sugibayashi; Noboru Sakimura; Takeshi Honda; Kiyokazu Nagahara; Kiyotaka Tsuji; Hideaki Numata; Sadahiko Miura; Ken Ichi Shimura; Yuko Kato; Shinsaku Saito; Yoshiyuki Fukumoto; Hiroaki Honjo; Tetsuhiro Suzuki; Katsumi Suemitsu; Tomonori Mukai; Kaoru Mori; Ryusuke Nebashi; Shunsuke Fukami; Norikazu Ohshima; Hiromitsu Hada; Nobuyuki Ishiwata; Naoki Kasai; Shuichi Tahara

doi:10.1109/JSSC.2007.906195

A 16-Mb toggle MRAM with burst modes

Tadahiko Sugibayashi, Noboru Sakimura, Takeshi Honda, Kiyokazu Nagahara, Kiyotaka Tsuji, Hideaki Numata, Sadahiko Miura, Ken Ichi Shimura, Yuko Kato, Shinsaku Saito, Yoshiyuki Fukumoto, Hiroaki Honjo, Tetsuhiro Suzuki, Katsumi Suemitsu, Tomonori Mukai, Kaoru Mori, Ryusuke Nebashi, Shunsuke Fukami, Norikazu Ohshima, Hiromitsu HadaNobuyuki Ishiwata, Naoki Kasai, Shuichi Tahara

Research output: Contribution to journal › Article › peer-review

13 Citations (Scopus)

Abstract

This paper describes a recently developed 16-Mb toggle magnetic random access memory (MRAM). It has 100-MHz burst modes that are compatible with a pseudo-SRAM even though the toggle cell requires reading and comparing sequences in write modes. To accelerate operating clock frequency, we propose a distributed-driver wide-swing current-mirror scheme, an interleaved and pipelined memory-array group activation scheme, and a noise-insulation switch scheme. These circuit schemes compensate the toggle cell timing overhead in write modes and maintain write-current precision that is essential for the wide operational margin of MRAMs. Because toggle cells are very resistant to write disturbance errors, we designed the 16-Mb MRAM to include a toggle MRAM cell. The MRAM was fabricated with 0.13-μm CMOS and 0.24-μm MRAM processes with five metal layers.

Original language	English
Article number	4362112
Pages (from-to)	2378-2385
Number of pages	8
Journal	IEEE Journal of Solid-State Circuits
Volume	42
Issue number	11
DOIs	https://doi.org/10.1109/JSSC.2007.906195
Publication status	Published - 2007 Nov
Externally published	Yes

Keywords

Burst mode
Magnetic random access memory (MRAM)
Pseudo-SRAM
toggle cell

ASJC Scopus subject areas

Electrical and Electronic Engineering

Access to Document

10.1109/JSSC.2007.906195

Cite this

Sugibayashi, T., Sakimura, N., Honda, T., Nagahara, K., Tsuji, K., Numata, H., Miura, S., Shimura, K. I., Kato, Y., Saito, S., Fukumoto, Y., Honjo, H., Suzuki, T., Suemitsu, K., Mukai, T., Mori, K., Nebashi, R., Fukami, S., Ohshima, N., ... Tahara, S. (2007). A 16-Mb toggle MRAM with burst modes. IEEE Journal of Solid-State Circuits, 42(11), 2378-2385. [4362112]. https://doi.org/10.1109/JSSC.2007.906195

A 16-Mb toggle MRAM with burst modes. / Sugibayashi, Tadahiko; Sakimura, Noboru; Honda, Takeshi; Nagahara, Kiyokazu; Tsuji, Kiyotaka; Numata, Hideaki; Miura, Sadahiko; Shimura, Ken Ichi; Kato, Yuko; Saito, Shinsaku; Fukumoto, Yoshiyuki; Honjo, Hiroaki; Suzuki, Tetsuhiro; Suemitsu, Katsumi; Mukai, Tomonori; Mori, Kaoru; Nebashi, Ryusuke; Fukami, Shunsuke; Ohshima, Norikazu; Hada, Hiromitsu; Ishiwata, Nobuyuki; Kasai, Naoki; Tahara, Shuichi.

In: IEEE Journal of Solid-State Circuits, Vol. 42, No. 11, 4362112, 11.2007, p. 2378-2385.

Research output: Contribution to journal › Article › peer-review

Sugibayashi, T, Sakimura, N, Honda, T, Nagahara, K, Tsuji, K, Numata, H, Miura, S, Shimura, KI, Kato, Y, Saito, S, Fukumoto, Y, Honjo, H, Suzuki, T, Suemitsu, K, Mukai, T, Mori, K, Nebashi, R, Fukami, S, Ohshima, N, Hada, H, Ishiwata, N, Kasai, N & Tahara, S 2007, 'A 16-Mb toggle MRAM with burst modes', IEEE Journal of Solid-State Circuits, vol. 42, no. 11, 4362112, pp. 2378-2385. https://doi.org/10.1109/JSSC.2007.906195

Sugibayashi, Tadahiko ; Sakimura, Noboru ; Honda, Takeshi ; Nagahara, Kiyokazu ; Tsuji, Kiyotaka ; Numata, Hideaki ; Miura, Sadahiko ; Shimura, Ken Ichi ; Kato, Yuko ; Saito, Shinsaku ; Fukumoto, Yoshiyuki ; Honjo, Hiroaki ; Suzuki, Tetsuhiro ; Suemitsu, Katsumi ; Mukai, Tomonori ; Mori, Kaoru ; Nebashi, Ryusuke ; Fukami, Shunsuke ; Ohshima, Norikazu ; Hada, Hiromitsu ; Ishiwata, Nobuyuki ; Kasai, Naoki ; Tahara, Shuichi. / A 16-Mb toggle MRAM with burst modes. In: IEEE Journal of Solid-State Circuits. 2007 ; Vol. 42, No. 11. pp. 2378-2385.

@article{531ce2578fb14a40a5dc6e06824c4974,

title = "A 16-Mb toggle MRAM with burst modes",

abstract = "This paper describes a recently developed 16-Mb toggle magnetic random access memory (MRAM). It has 100-MHz burst modes that are compatible with a pseudo-SRAM even though the toggle cell requires reading and comparing sequences in write modes. To accelerate operating clock frequency, we propose a distributed-driver wide-swing current-mirror scheme, an interleaved and pipelined memory-array group activation scheme, and a noise-insulation switch scheme. These circuit schemes compensate the toggle cell timing overhead in write modes and maintain write-current precision that is essential for the wide operational margin of MRAMs. Because toggle cells are very resistant to write disturbance errors, we designed the 16-Mb MRAM to include a toggle MRAM cell. The MRAM was fabricated with 0.13-μm CMOS and 0.24-μm MRAM processes with five metal layers.",

keywords = "Burst mode, Magnetic random access memory (MRAM), Pseudo-SRAM, toggle cell",

author = "Tadahiko Sugibayashi and Noboru Sakimura and Takeshi Honda and Kiyokazu Nagahara and Kiyotaka Tsuji and Hideaki Numata and Sadahiko Miura and Shimura, {Ken Ichi} and Yuko Kato and Shinsaku Saito and Yoshiyuki Fukumoto and Hiroaki Honjo and Tetsuhiro Suzuki and Katsumi Suemitsu and Tomonori Mukai and Kaoru Mori and Ryusuke Nebashi and Shunsuke Fukami and Norikazu Ohshima and Hiromitsu Hada and Nobuyuki Ishiwata and Naoki Kasai and Shuichi Tahara",

year = "2007",

month = nov,

doi = "10.1109/JSSC.2007.906195",

language = "English",

volume = "42",

pages = "2378--2385",

journal = "IEEE Journal of Solid-State Circuits",

issn = "0018-9200",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "11",

}

TY - JOUR

T1 - A 16-Mb toggle MRAM with burst modes

AU - Sugibayashi, Tadahiko

AU - Sakimura, Noboru

AU - Honda, Takeshi

AU - Nagahara, Kiyokazu

AU - Tsuji, Kiyotaka

AU - Numata, Hideaki

AU - Miura, Sadahiko

AU - Shimura, Ken Ichi

AU - Kato, Yuko

AU - Saito, Shinsaku

AU - Fukumoto, Yoshiyuki

AU - Honjo, Hiroaki

AU - Suzuki, Tetsuhiro

AU - Suemitsu, Katsumi

AU - Mukai, Tomonori

AU - Mori, Kaoru

AU - Nebashi, Ryusuke

AU - Fukami, Shunsuke

AU - Ohshima, Norikazu

AU - Hada, Hiromitsu

AU - Ishiwata, Nobuyuki

AU - Kasai, Naoki

AU - Tahara, Shuichi

PY - 2007/11

Y1 - 2007/11

N2 - This paper describes a recently developed 16-Mb toggle magnetic random access memory (MRAM). It has 100-MHz burst modes that are compatible with a pseudo-SRAM even though the toggle cell requires reading and comparing sequences in write modes. To accelerate operating clock frequency, we propose a distributed-driver wide-swing current-mirror scheme, an interleaved and pipelined memory-array group activation scheme, and a noise-insulation switch scheme. These circuit schemes compensate the toggle cell timing overhead in write modes and maintain write-current precision that is essential for the wide operational margin of MRAMs. Because toggle cells are very resistant to write disturbance errors, we designed the 16-Mb MRAM to include a toggle MRAM cell. The MRAM was fabricated with 0.13-μm CMOS and 0.24-μm MRAM processes with five metal layers.

AB - This paper describes a recently developed 16-Mb toggle magnetic random access memory (MRAM). It has 100-MHz burst modes that are compatible with a pseudo-SRAM even though the toggle cell requires reading and comparing sequences in write modes. To accelerate operating clock frequency, we propose a distributed-driver wide-swing current-mirror scheme, an interleaved and pipelined memory-array group activation scheme, and a noise-insulation switch scheme. These circuit schemes compensate the toggle cell timing overhead in write modes and maintain write-current precision that is essential for the wide operational margin of MRAMs. Because toggle cells are very resistant to write disturbance errors, we designed the 16-Mb MRAM to include a toggle MRAM cell. The MRAM was fabricated with 0.13-μm CMOS and 0.24-μm MRAM processes with five metal layers.

KW - Burst mode

KW - Magnetic random access memory (MRAM)

KW - Pseudo-SRAM

KW - toggle cell

UR - http://www.scopus.com/inward/record.url?scp=38149106720&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=38149106720&partnerID=8YFLogxK

U2 - 10.1109/JSSC.2007.906195

DO - 10.1109/JSSC.2007.906195

M3 - Article

AN - SCOPUS:38149106720

VL - 42

SP - 2378

EP - 2385

JO - IEEE Journal of Solid-State Circuits

JF - IEEE Journal of Solid-State Circuits

SN - 0018-9200

IS - 11

M1 - 4362112

ER -

A 16-Mb toggle MRAM with burst modes

Abstract

Keywords

ASJC Scopus subject areas

Access to Document

Other files and links

Fingerprint

Cite this