A 120-GHz transmitter and receiver chipset with 9-Gbps data rate using 65-nm CMOS technology

Ryuichi Fujimoto, Mizuki Motoyoshi, Kyoya Takano, Uroschanit Yodprasit, Minoru Fujishima

Research output: Contribution to journalArticle

5 Citations (Scopus)

Abstract

The design and measured results of a 120-GHz transmitter and receiver chipset are described in this paper. A simple on-off keying (OOK) modulation is adopted for low power consumption. The proposed transmitter and receiver are fabricated using 65-nm CMOS technology. The current consumption of the transmitter and receiver are 19.2 mA and 48.2 mA respectively. A 9-Gbps PRBS is successfully transferred from the transmitter to the receiver with the bit error rate less than 10-9.

Original languageEnglish
Pages (from-to)1154-1162
Number of pages9
JournalIEICE Transactions on Electronics
VolumeE95-C
Issue number7
DOIs
Publication statusPublished - 2012 Jul
Externally publishedYes

Keywords

  • CMOS
  • Millimeter wave
  • OOK modulation
  • Transceiver

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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