80Gbit/s multiplexer IC using InAAs/InGaAs/InP HEMTs

Taiichi Otsuji; K. Murata; T. Enoki; Y. Umeda

doi:10.1049/el:19980001

80Gbit/s multiplexer IC using InAAs/InGaAs/InP HEMTs

Taiichi Otsuji, K. Murata, T. Enoki, Y. Umeda

Research output: Contribution to journal › Article › peer-review

2 Citations (Scopus)

Abstract

The authors report an 80Gbit/s 2:1 selector-type multiplexer IC using InAlAs/InGaAs/InP HEMTs incorporating a high-speed double-layer interconnection process with a low-permittivity insulator. The record operating data rate was measured on a 3in wafer. In spite of the bandwidth limitation on the measurement setup, clear eye patterns were successfully observed for the first time.

Original language	English
Pages (from-to)	113-114
Number of pages	2
Journal	Electronics Letters
Volume	34
Issue number	1
DOIs	https://doi.org/10.1049/el:19980001
Publication status	Published - 1998 Jan 8
Externally published	Yes

ASJC Scopus subject areas

Electrical and Electronic Engineering

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10.1049/el:19980001

Cite this

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abstract = "The authors report an 80Gbit/s 2:1 selector-type multiplexer IC using InAlAs/InGaAs/InP HEMTs incorporating a high-speed double-layer interconnection process with a low-permittivity insulator. The record operating data rate was measured on a 3in wafer. In spite of the bandwidth limitation on the measurement setup, clear eye patterns were successfully observed for the first time.",

author = "Taiichi Otsuji and K. Murata and T. Enoki and Y. Umeda",

year = "1998",

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AU - Otsuji, Taiichi

AU - Murata, K.

AU - Enoki, T.

AU - Umeda, Y.

PY - 1998/1/8

Y1 - 1998/1/8

N2 - The authors report an 80Gbit/s 2:1 selector-type multiplexer IC using InAlAs/InGaAs/InP HEMTs incorporating a high-speed double-layer interconnection process with a low-permittivity insulator. The record operating data rate was measured on a 3in wafer. In spite of the bandwidth limitation on the measurement setup, clear eye patterns were successfully observed for the first time.

AB - The authors report an 80Gbit/s 2:1 selector-type multiplexer IC using InAlAs/InGaAs/InP HEMTs incorporating a high-speed double-layer interconnection process with a low-permittivity insulator. The record operating data rate was measured on a 3in wafer. In spite of the bandwidth limitation on the measurement setup, clear eye patterns were successfully observed for the first time.

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80Gbit/s multiplexer IC using InAAs/InGaAs/InP HEMTs

Abstract

ASJC Scopus subject areas

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