67-GHz static frequency divider using 0.2-μm self-aligned SiGe HBTs

Katsuyoshi Washio, Reiko Hayami, Eiji Ohue, Katsuya Oda, Masamichi Tanabe, Hiromi Shimamoto, Masao Kondo

Research output: Contribution to journalConference article

27 Citations (Scopus)

Abstract

A 67-GHz 1/4 static frequency divider using 0.2-μm self-aligned selective-epitaxial-growth SiGe heterqjunction bipolar transistors, with a 122-GHz cutoff frequency, a 163-GHz maximum oscillation frequency, and an average emitter coupled logic gate delay time of 5.65 ps, was developed. The pretracking master-slave toggle flip-flop (MS-TFF) of the divider increases the maximum operating frequency to about 15% higher than that of a conventional MS-TFF, yet the power consumption of the divider is 175 mW, which is 1/5 that of comparable dividers, at a supply voltage of -5.2 V. Index Terms -.

Original languageEnglish
Pages (from-to)3-8
Number of pages6
JournalIEEE Transactions on Microwave Theory and Techniques
Volume49
Issue number1
DOIs
Publication statusPublished - 2001 Dec 1
Externally publishedYes
Event2000 Radio-Frequency Integrated Circuits (RFIC) Conference and Automatic Radio Frequency Techniques Group (ARFTG) Meeting - Boston, MA, United States
Duration: 2000 Jun 122000 Jun 16

Keywords

  • Bipolar transistors
  • Emitter coupled logic
  • Epitaxial growth
  • Frequency conversion
  • Heterojunctions
  • Millimeter-wave bipolar integrated circuits
  • Mimics
  • Optical communication

ASJC Scopus subject areas

  • Radiation
  • Condensed Matter Physics
  • Electrical and Electronic Engineering

Fingerprint Dive into the research topics of '67-GHz static frequency divider using 0.2-μm self-aligned SiGe HBTs'. Together they form a unique fingerprint.

  • Cite this