67-GHz static frequency divider using 0.2-μm self-aligned SiGe HBTs

Katsuyoshi Washio; Reiko Hayami; Eiji Ohue; Katsuya Oda; Masamichi Tanabe; Hiromi Shimamoto; Masao Kondo

doi:10.1109/22.899955

67-GHz static frequency divider using 0.2-μm self-aligned SiGe HBTs

Katsuyoshi Washio, Reiko Hayami, Eiji Ohue, Katsuya Oda, Masamichi Tanabe, Hiromi Shimamoto, Masao Kondo

Research output: Contribution to journal › Conference article › peer-review

27 Citations (Scopus)

Abstract

A 67-GHz 1/4 static frequency divider using 0.2-μm self-aligned selective-epitaxial-growth SiGe heterqjunction bipolar transistors, with a 122-GHz cutoff frequency, a 163-GHz maximum oscillation frequency, and an average emitter coupled logic gate delay time of 5.65 ps, was developed. The pretracking master-slave toggle flip-flop (MS-TFF) of the divider increases the maximum operating frequency to about 15% higher than that of a conventional MS-TFF, yet the power consumption of the divider is 175 mW, which is 1/5 that of comparable dividers, at a supply voltage of -5.2 V. Index Terms -.

Original language	English
Pages (from-to)	3-8
Number of pages	6
Journal	IEEE Transactions on Microwave Theory and Techniques
Volume	49
Issue number	1
DOIs	https://doi.org/10.1109/22.899955
Publication status	Published - 2001 Dec 1
Externally published	Yes
Event	2000 Radio-Frequency Integrated Circuits (RFIC) Conference and Automatic Radio Frequency Techniques Group (ARFTG) Meeting - Boston, MA, United States Duration: 2000 Jun 12 → 2000 Jun 16

Keywords

Bipolar transistors
Emitter coupled logic
Epitaxial growth
Frequency conversion
Heterojunctions
Millimeter-wave bipolar integrated circuits
Mimics
Optical communication

ASJC Scopus subject areas

Radiation
Condensed Matter Physics
Electrical and Electronic Engineering

Access to Document

10.1109/22.899955

Cite this

@article{420dc3bdc6404b318fbab31327b0ace8,

title = "67-GHz static frequency divider using 0.2-μm self-aligned SiGe HBTs",

abstract = "A 67-GHz 1/4 static frequency divider using 0.2-μm self-aligned selective-epitaxial-growth SiGe heterqjunction bipolar transistors, with a 122-GHz cutoff frequency, a 163-GHz maximum oscillation frequency, and an average emitter coupled logic gate delay time of 5.65 ps, was developed. The pretracking master-slave toggle flip-flop (MS-TFF) of the divider increases the maximum operating frequency to about 15% higher than that of a conventional MS-TFF, yet the power consumption of the divider is 175 mW, which is 1/5 that of comparable dividers, at a supply voltage of -5.2 V. Index Terms -.",

keywords = "Bipolar transistors, Emitter coupled logic, Epitaxial growth, Frequency conversion, Heterojunctions, Millimeter-wave bipolar integrated circuits, Mimics, Optical communication",

author = "Katsuyoshi Washio and Reiko Hayami and Eiji Ohue and Katsuya Oda and Masamichi Tanabe and Hiromi Shimamoto and Masao Kondo",

year = "2001",

month = dec,

day = "1",

doi = "10.1109/22.899955",

language = "English",

volume = "49",

pages = "3--8",

journal = "IRE Transactions on Microwave Theory and Techniques",

issn = "0018-9480",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "1",

note = "2000 Radio-Frequency Integrated Circuits (RFIC) Conference and Automatic Radio Frequency Techniques Group (ARFTG) Meeting ; Conference date: 12-06-2000 Through 16-06-2000",

}

TY - JOUR

T1 - 67-GHz static frequency divider using 0.2-μm self-aligned SiGe HBTs

AU - Washio, Katsuyoshi

AU - Hayami, Reiko

AU - Ohue, Eiji

AU - Oda, Katsuya

AU - Tanabe, Masamichi

AU - Shimamoto, Hiromi

AU - Kondo, Masao

PY - 2001/12/1

Y1 - 2001/12/1

N2 - A 67-GHz 1/4 static frequency divider using 0.2-μm self-aligned selective-epitaxial-growth SiGe heterqjunction bipolar transistors, with a 122-GHz cutoff frequency, a 163-GHz maximum oscillation frequency, and an average emitter coupled logic gate delay time of 5.65 ps, was developed. The pretracking master-slave toggle flip-flop (MS-TFF) of the divider increases the maximum operating frequency to about 15% higher than that of a conventional MS-TFF, yet the power consumption of the divider is 175 mW, which is 1/5 that of comparable dividers, at a supply voltage of -5.2 V. Index Terms -.

AB - A 67-GHz 1/4 static frequency divider using 0.2-μm self-aligned selective-epitaxial-growth SiGe heterqjunction bipolar transistors, with a 122-GHz cutoff frequency, a 163-GHz maximum oscillation frequency, and an average emitter coupled logic gate delay time of 5.65 ps, was developed. The pretracking master-slave toggle flip-flop (MS-TFF) of the divider increases the maximum operating frequency to about 15% higher than that of a conventional MS-TFF, yet the power consumption of the divider is 175 mW, which is 1/5 that of comparable dividers, at a supply voltage of -5.2 V. Index Terms -.

KW - Bipolar transistors

KW - Emitter coupled logic

KW - Epitaxial growth

KW - Frequency conversion

KW - Heterojunctions

KW - Millimeter-wave bipolar integrated circuits

KW - Mimics

KW - Optical communication

UR - http://www.scopus.com/inward/record.url?scp=0034831823&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0034831823&partnerID=8YFLogxK

U2 - 10.1109/22.899955

DO - 10.1109/22.899955

M3 - Conference article

AN - SCOPUS:0034831823

VL - 49

SP - 3

EP - 8

JO - IRE Transactions on Microwave Theory and Techniques

JF - IRE Transactions on Microwave Theory and Techniques

SN - 0018-9480

IS - 1

T2 - 2000 Radio-Frequency Integrated Circuits (RFIC) Conference and Automatic Radio Frequency Techniques Group (ARFTG) Meeting

Y2 - 12 June 2000 through 16 June 2000

ER -

67-GHz static frequency divider using 0.2-μm self-aligned SiGe HBTs

Abstract

Keywords

ASJC Scopus subject areas

Access to Document

Other files and links

Fingerprint

Cite this