40 Gb/s analog IC chipset for optical receiver using SiGe HBTs

T. Masuda; K. Ohhata; E. Ohue; K. Oda; M. Tanabe; H. Shimamoto; T. Onai; K. Washio

40 Gb/s analog IC chipset for optical receiver using SiGe HBTs

T. Masuda, K. Ohhata, E. Ohue, K. Oda, M. Tanabe, H. Shimamoto, T. Onai, K. Washio

Research output: Contribution to journal › Conference article › peer-review

Abstract

A self-aligned selective-epitaxial SiGe-based heterojunction bipolar transistor (HBT) is used to fabricate a 40 Gb/s optical receiver. The SiGe-based HBT provides low parasitic capacitance and high-frequency characteristics. 3.6fF collector capacitance and 0.6fF substrate capacitance at 5 V reverse bias voltage are obtained. The cutoff frequency and the maximum oscillation frequency of the transistors with an emitter area of 0.14×1.5 μm² are 92 GHz and 108 GHz at 2 V collector-to-emitter bias, respectively. The early voltage of >100 V is suitable for analog circuits.

Original language	English
Pages (from-to)	314-315, 454
Journal	Digest of Technical Papers - IEEE International Solid-State Circuits Conference
Publication status	Published - 1998 Jan 1
Externally published	Yes
Event	Proceedings of the 1998 IEEE 45th International Solid-State Circuits Conference, ISSCC - San Francisco, CA, USA Duration: 1998 Feb 5 → 1998 Feb 7

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

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title = "40 Gb/s analog IC chipset for optical receiver using SiGe HBTs",

abstract = "A self-aligned selective-epitaxial SiGe-based heterojunction bipolar transistor (HBT) is used to fabricate a 40 Gb/s optical receiver. The SiGe-based HBT provides low parasitic capacitance and high-frequency characteristics. 3.6fF collector capacitance and 0.6fF substrate capacitance at 5 V reverse bias voltage are obtained. The cutoff frequency and the maximum oscillation frequency of the transistors with an emitter area of 0.14×1.5 μm2 are 92 GHz and 108 GHz at 2 V collector-to-emitter bias, respectively. The early voltage of >100 V is suitable for analog circuits.",

author = "T. Masuda and K. Ohhata and E. Ohue and K. Oda and M. Tanabe and H. Shimamoto and T. Onai and K. Washio",

year = "1998",

month = jan,

day = "1",

language = "English",

pages = "314--315, 454",

journal = "Digest of Technical Papers - IEEE International Solid-State Circuits Conference",

issn = "0193-6530",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "Proceedings of the 1998 IEEE 45th International Solid-State Circuits Conference, ISSCC ; Conference date: 05-02-1998 Through 07-02-1998",

}

TY - JOUR

T1 - 40 Gb/s analog IC chipset for optical receiver using SiGe HBTs

AU - Masuda, T.

AU - Ohhata, K.

AU - Ohue, E.

AU - Oda, K.

AU - Tanabe, M.

AU - Shimamoto, H.

AU - Onai, T.

AU - Washio, K.

PY - 1998/1/1

Y1 - 1998/1/1

N2 - A self-aligned selective-epitaxial SiGe-based heterojunction bipolar transistor (HBT) is used to fabricate a 40 Gb/s optical receiver. The SiGe-based HBT provides low parasitic capacitance and high-frequency characteristics. 3.6fF collector capacitance and 0.6fF substrate capacitance at 5 V reverse bias voltage are obtained. The cutoff frequency and the maximum oscillation frequency of the transistors with an emitter area of 0.14×1.5 μm2 are 92 GHz and 108 GHz at 2 V collector-to-emitter bias, respectively. The early voltage of >100 V is suitable for analog circuits.

AB - A self-aligned selective-epitaxial SiGe-based heterojunction bipolar transistor (HBT) is used to fabricate a 40 Gb/s optical receiver. The SiGe-based HBT provides low parasitic capacitance and high-frequency characteristics. 3.6fF collector capacitance and 0.6fF substrate capacitance at 5 V reverse bias voltage are obtained. The cutoff frequency and the maximum oscillation frequency of the transistors with an emitter area of 0.14×1.5 μm2 are 92 GHz and 108 GHz at 2 V collector-to-emitter bias, respectively. The early voltage of >100 V is suitable for analog circuits.

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M3 - Conference article

AN - SCOPUS:0031655067

SP - 314-315, 454

JO - Digest of Technical Papers - IEEE International Solid-State Circuits Conference

JF - Digest of Technical Papers - IEEE International Solid-State Circuits Conference

SN - 0193-6530

T2 - Proceedings of the 1998 IEEE 45th International Solid-State Circuits Conference, ISSCC

Y2 - 5 February 1998 through 7 February 1998

ER -