3D-IC technology using ultra-thin chips

Mitsumasa Koyanagi

Research output: Chapter in Book/Report/Conference proceedingChapter

Abstract

Various generic methods for the three-dimensional (3D) integration of integrated circuits (ICs) are discussed. All these methods rely on ultra-thin chips. Wafer-to-wafer bonding, chip-to-wafer bonding, multichip-to-wafer bonding and reconfigured wafer-to-wafer bonding are described and compared. Several test chips fabricated by that use some of those concepts are briefly mentioned. Finally, specific concerns related to 3D-IC integration that use ultra-thin chips are indicated.

Original languageEnglish
Title of host publicationUltra-thin Chip Technology and Applications
PublisherSpringer New York
Pages109-123
Number of pages15
ISBN (Print)9781441972750
DOIs
Publication statusPublished - 2011 Dec 1

ASJC Scopus subject areas

  • Engineering(all)

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