32 multiplied by 32 BIT MULTIPLIER USING MULTIPLE-VALUED MOS CURRENT-MODE CIRCUITS.

Shoji Kawahito, Michitaka Kameyama, Tatsuo Higuchi, Haruyasu Yamada

Research output: Contribution to journalConference articlepeer-review

2 Citations (Scopus)

Abstract

The authors present a high-speed compact multiplier based on the radix-four signed-digit (SD) number system. Multiple-valued bidirectional current-mode (BDCM) circuits are used for the implementation of the circuit. The BDCM circuits are composed of two types of enhancement-mode MOS devices and a depletion-mode p-channel MOS device used for a current source. Reported performance results show the effectiveness of the approach.

Original languageEnglish
Pages (from-to)99-100
Number of pages2
JournalDigest of Technical Papers - Symposium on VLSI Technology
Publication statusPublished - 1987 Dec 1
EventDig Tech Pap Symp VLSI Technol 1987 - Karuizawa, Jpn
Duration: 1987 May 221987 May 23

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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