The authors present a high-speed compact multiplier based on the radix-four signed-digit (SD) number system. Multiple-valued bidirectional current-mode (BDCM) circuits are used for the implementation of the circuit. The BDCM circuits are composed of two types of enhancement-mode MOS devices and a depletion-mode p-channel MOS device used for a current source. Reported performance results show the effectiveness of the approach.
|Number of pages||2|
|Journal||Digest of Technical Papers - Symposium on VLSI Technology|
|Publication status||Published - 1987 Dec 1|
|Event||Dig Tech Pap Symp VLSI Technol 1987 - Karuizawa, Jpn|
Duration: 1987 May 22 → 1987 May 23
ASJC Scopus subject areas
- Electrical and Electronic Engineering