32 multiplied by 32 BIT MULTIPLIER USING MULTIPLE-VALUED MOS CURRENT-MODE CIRCUITS.

Shoji Kawahito; Michitaka Kameyama; Tatsuo Higuchi; Haruyasu Yamada

32 multiplied by 32 BIT MULTIPLIER USING MULTIPLE-VALUED MOS CURRENT-MODE CIRCUITS.

Shoji Kawahito, Michitaka Kameyama, Tatsuo Higuchi, Haruyasu Yamada

INF - Computer and Mathematical Sciences

Research output: Contribution to journal › Conference article › peer-review

2 Citations (Scopus)

Abstract

The authors present a high-speed compact multiplier based on the radix-four signed-digit (SD) number system. Multiple-valued bidirectional current-mode (BDCM) circuits are used for the implementation of the circuit. The BDCM circuits are composed of two types of enhancement-mode MOS devices and a depletion-mode p-channel MOS device used for a current source. Reported performance results show the effectiveness of the approach.

Original language	English
Pages (from-to)	99-100
Number of pages	2
Journal	Digest of Technical Papers - Symposium on VLSI Technology
Publication status	Published - 1987 Dec 1
Event	Dig Tech Pap Symp VLSI Technol 1987 - Karuizawa, Jpn Duration: 1987 May 22 → 1987 May 23

ASJC Scopus subject areas

Electrical and Electronic Engineering

Cite this

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title = "32 multiplied by 32 BIT MULTIPLIER USING MULTIPLE-VALUED MOS CURRENT-MODE CIRCUITS.",

abstract = "The authors present a high-speed compact multiplier based on the radix-four signed-digit (SD) number system. Multiple-valued bidirectional current-mode (BDCM) circuits are used for the implementation of the circuit. The BDCM circuits are composed of two types of enhancement-mode MOS devices and a depletion-mode p-channel MOS device used for a current source. Reported performance results show the effectiveness of the approach.",

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year = "1987",

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journal = "Digest of Technical Papers - Symposium on VLSI Technology",

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T1 - 32 multiplied by 32 BIT MULTIPLIER USING MULTIPLE-VALUED MOS CURRENT-MODE CIRCUITS.

AU - Kawahito, Shoji

AU - Kameyama, Michitaka

AU - Higuchi, Tatsuo

AU - Yamada, Haruyasu

PY - 1987/12/1

Y1 - 1987/12/1

N2 - The authors present a high-speed compact multiplier based on the radix-four signed-digit (SD) number system. Multiple-valued bidirectional current-mode (BDCM) circuits are used for the implementation of the circuit. The BDCM circuits are composed of two types of enhancement-mode MOS devices and a depletion-mode p-channel MOS device used for a current source. Reported performance results show the effectiveness of the approach.

AB - The authors present a high-speed compact multiplier based on the radix-four signed-digit (SD) number system. Multiple-valued bidirectional current-mode (BDCM) circuits are used for the implementation of the circuit. The BDCM circuits are composed of two types of enhancement-mode MOS devices and a depletion-mode p-channel MOS device used for a current source. Reported performance results show the effectiveness of the approach.

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M3 - Conference article

AN - SCOPUS:0023545914

SP - 99

EP - 100

JO - Digest of Technical Papers - Symposium on VLSI Technology

JF - Digest of Technical Papers - Symposium on VLSI Technology

SN - 0743-1562

T2 - Dig Tech Pap Symp VLSI Technol 1987

Y2 - 22 May 1987 through 23 May 1987

ER -

32 multiplied by 32 BIT MULTIPLIER USING MULTIPLE-VALUED MOS CURRENT-MODE CIRCUITS.

Abstract

ASJC Scopus subject areas

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