30-nm-gate InAlAs/InGaAs HEMTs lattice-matched to InP substrates

Tetsuya Suemitsu, Tetsuyoshi Ishii, Haruki Yokoyama, Yohtaro Umeda, Takatomo Enoki, Yasunobu Ishii, Toshiaki Tamamura

Research output: Contribution to journalConference articlepeer-review

44 Citations (Scopus)

Abstract

In this paper, we report the fabrication and the device characteristics of the InP-based lattice-matched HEMTs with a 30-mn gate, which is the smallest gate yet achieved for inP-based HEMTs. A fullerene-incorporated nanocomposite resist is used in electron beam (EB) lithography to achieve such a small gate. A cutoff frequency of the 30-nm-gate HEMTs is 350 GHz, which is comparable to the reported value for 50-nm-gate InP-based pseudomorphic HEMTs and one of the highest value achieved by any kind of three-terminal electronic device.

Original languageEnglish
Pages (from-to)223-226
Number of pages4
JournalTechnical Digest - International Electron Devices Meeting
Publication statusPublished - 1998 Dec 1
Externally publishedYes
EventProceedings of the 1998 IEEE International Electron Devices Meeting - San Francisco, CA, USA
Duration: 1998 Dec 61998 Dec 9

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Electrical and Electronic Engineering
  • Materials Chemistry

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