(100)- and (110)-oriented nMOSFETs with highly scaled EOT in La-silicate/Si interface for multi-gate architecture

T. Kawanago; K. Kakushima; P. Ahmet; Y. Kataoka; A. Nishiyama; N. Sugii; K. Tsutsui; K. Natori; T. Hattori; H. Iwai

doi:10.1109/ESSDERC.2012.6343340

(100)- and (110)-oriented nMOSFETs with highly scaled EOT in La-silicate/Si interface for multi-gate architecture

T. Kawanago, K. Kakushima, P. Ahmet, Y. Kataoka, A. Nishiyama, N. Sugii, K. Tsutsui, K. Natori, T. Hattori, H. Iwai

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

1 Citation (Scopus)

Abstract

This paper reports on detailed comparison between (100)- and (110)-oriented nMOSFETs with direct contact of La-silicate/Si interface structure for expansion to multi-gate architecture including FinFETs, trigate FETs, and nanowire FETs. Scaled EOT of 0.73 nm for (110)-oriented nMOSFETs has been achieved as well as (100)-oriented nMOSFETs. Although the large interface state density originating from (110) orientation was observed, fairly nice interfacial property was obtained from (110)-oriented nMOSFETs at scaled EOT region. Moreover, larger interface state density in (110) orientation did not affect on V_th instability. It was found that V_th shift of nMOSFETs is mainly caused by bulk trapping of electron in La-silicate as well as Hf-based oxides.

Original language	English
Title of host publication	2012 Proceedings of the European Solid-State Device Research Conference, ESSDERC 2012
Pages	89-92
Number of pages	4
DOIs	https://doi.org/10.1109/ESSDERC.2012.6343340
Publication status	Published - 2012
Event	42nd European Solid-State Device Research Conference, ESSDERC 2012 - Bordeaux, France Duration: 2012 Sep 17 → 2012 Sep 21

Publication series

Name	European Solid-State Device Research Conference
ISSN (Print)	1930-8876

Other

Other	42nd European Solid-State Device Research Conference, ESSDERC 2012
Country/Territory	France
City	Bordeaux
Period	12/9/17 → 12/9/21

ASJC Scopus subject areas

Electrical and Electronic Engineering
Safety, Risk, Reliability and Quality

Access to Document

10.1109/ESSDERC.2012.6343340

Cite this

Kawanago, T., Kakushima, K., Ahmet, P., Kataoka, Y., Nishiyama, A., Sugii, N., Tsutsui, K., Natori, K., Hattori, T., & Iwai, H. (2012). (100)- and (110)-oriented nMOSFETs with highly scaled EOT in La-silicate/Si interface for multi-gate architecture. In 2012 Proceedings of the European Solid-State Device Research Conference, ESSDERC 2012 (pp. 89-92). [6343340] (European Solid-State Device Research Conference). https://doi.org/10.1109/ESSDERC.2012.6343340

(100)- and (110)-oriented nMOSFETs with highly scaled EOT in La-silicate/Si interface for multi-gate architecture. / Kawanago, T.; Kakushima, K.; Ahmet, P.; Kataoka, Y.; Nishiyama, A.; Sugii, N.; Tsutsui, K.; Natori, K.; Hattori, T.; Iwai, H.

2012 Proceedings of the European Solid-State Device Research Conference, ESSDERC 2012. 2012. p. 89-92 6343340 (European Solid-State Device Research Conference).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Kawanago, T, Kakushima, K, Ahmet, P, Kataoka, Y, Nishiyama, A, Sugii, N, Tsutsui, K, Natori, K, Hattori, T & Iwai, H 2012, (100)- and (110)-oriented nMOSFETs with highly scaled EOT in La-silicate/Si interface for multi-gate architecture. in 2012 Proceedings of the European Solid-State Device Research Conference, ESSDERC 2012., 6343340, European Solid-State Device Research Conference, pp. 89-92, 42nd European Solid-State Device Research Conference, ESSDERC 2012, Bordeaux, France, 12/9/17. https://doi.org/10.1109/ESSDERC.2012.6343340

Kawanago T, Kakushima K, Ahmet P, Kataoka Y, Nishiyama A, Sugii N et al. (100)- and (110)-oriented nMOSFETs with highly scaled EOT in La-silicate/Si interface for multi-gate architecture. In 2012 Proceedings of the European Solid-State Device Research Conference, ESSDERC 2012. 2012. p. 89-92. 6343340. (European Solid-State Device Research Conference). https://doi.org/10.1109/ESSDERC.2012.6343340

Kawanago, T. ; Kakushima, K. ; Ahmet, P. ; Kataoka, Y. ; Nishiyama, A. ; Sugii, N. ; Tsutsui, K. ; Natori, K. ; Hattori, T. ; Iwai, H. / (100)- and (110)-oriented nMOSFETs with highly scaled EOT in La-silicate/Si interface for multi-gate architecture. 2012 Proceedings of the European Solid-State Device Research Conference, ESSDERC 2012. 2012. pp. 89-92 (European Solid-State Device Research Conference).

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title = "(100)- and (110)-oriented nMOSFETs with highly scaled EOT in La-silicate/Si interface for multi-gate architecture",

abstract = "This paper reports on detailed comparison between (100)- and (110)-oriented nMOSFETs with direct contact of La-silicate/Si interface structure for expansion to multi-gate architecture including FinFETs, trigate FETs, and nanowire FETs. Scaled EOT of 0.73 nm for (110)-oriented nMOSFETs has been achieved as well as (100)-oriented nMOSFETs. Although the large interface state density originating from (110) orientation was observed, fairly nice interfacial property was obtained from (110)-oriented nMOSFETs at scaled EOT region. Moreover, larger interface state density in (110) orientation did not affect on Vth instability. It was found that Vth shift of nMOSFETs is mainly caused by bulk trapping of electron in La-silicate as well as Hf-based oxides.",

author = "T. Kawanago and K. Kakushima and P. Ahmet and Y. Kataoka and A. Nishiyama and N. Sugii and K. Tsutsui and K. Natori and T. Hattori and H. Iwai",

year = "2012",

doi = "10.1109/ESSDERC.2012.6343340",

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series = "European Solid-State Device Research Conference",

pages = "89--92",

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AU - Kawanago, T.

AU - Kakushima, K.

AU - Ahmet, P.

AU - Kataoka, Y.

AU - Nishiyama, A.

AU - Sugii, N.

AU - Tsutsui, K.

AU - Natori, K.

AU - Hattori, T.

AU - Iwai, H.

PY - 2012

Y1 - 2012

N2 - This paper reports on detailed comparison between (100)- and (110)-oriented nMOSFETs with direct contact of La-silicate/Si interface structure for expansion to multi-gate architecture including FinFETs, trigate FETs, and nanowire FETs. Scaled EOT of 0.73 nm for (110)-oriented nMOSFETs has been achieved as well as (100)-oriented nMOSFETs. Although the large interface state density originating from (110) orientation was observed, fairly nice interfacial property was obtained from (110)-oriented nMOSFETs at scaled EOT region. Moreover, larger interface state density in (110) orientation did not affect on Vth instability. It was found that Vth shift of nMOSFETs is mainly caused by bulk trapping of electron in La-silicate as well as Hf-based oxides.

AB - This paper reports on detailed comparison between (100)- and (110)-oriented nMOSFETs with direct contact of La-silicate/Si interface structure for expansion to multi-gate architecture including FinFETs, trigate FETs, and nanowire FETs. Scaled EOT of 0.73 nm for (110)-oriented nMOSFETs has been achieved as well as (100)-oriented nMOSFETs. Although the large interface state density originating from (110) orientation was observed, fairly nice interfacial property was obtained from (110)-oriented nMOSFETs at scaled EOT region. Moreover, larger interface state density in (110) orientation did not affect on Vth instability. It was found that Vth shift of nMOSFETs is mainly caused by bulk trapping of electron in La-silicate as well as Hf-based oxides.

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SN - 9781467317078

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BT - 2012 Proceedings of the European Solid-State Device Research Conference, ESSDERC 2012

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Y2 - 17 September 2012 through 21 September 2012

ER -

(100)- and (110)-oriented nMOSFETs with highly scaled EOT in La-silicate/Si interface for multi-gate architecture

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